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Esterel Studio fully supports the IP-XACT™ specifications
from The SPIRIT Consortium™

Esterel EDA Technologies has joined The SPIRIT Consortium as a reviewing member to access the IP-XACT specification and upgrade its Esterel Studio product to support the new specifications for improved multi-vendor IP design and tool flow integration. Esterel Studio generates IP-XACT enabled meta-data so that the SystemC, VHDL and Verilog generated from Esterel Studio can now be packaged with an IP exchange format to enable easily import into other IP-XACT enabled ESL and RTL level tools.

We believe that the quick pace of adoption of the SPIRIT Consortium IP-XACT standard will provide companies designing SoCs with a high degree of flexibility and time to market advantage over manual IP integration methods.

The integration of Esterel Studio's configurable IP design flow with IP integration tools using the IP-XACT specifications combines the best of the state of the art.

Eric Bantegnie CEO of Esterel Technologies.
Esterel Studio to ARM SOC Designer and Synopsis CoreAssembler flow, using SPIRIT-IP-XACT meta-data

Automated ESL to RTL flow

Esterel Studio provides an automated ESL to RTL flow starting from a formally verified IP executable specification, generates SystemC, VHDL and Verilog code together with IP-XACT enabled meta-data for use by other IP-XACT enabled ESL and RTL tools.

Esterel Studio is the optimal choice for the specification and design of many IP blocks.

Esterel Studio export with IP-XACT support enables SOC Architects and Designers to

  • Quickly import Esterel Studio IP into their ESL and RTL flow.
  • Release configurable RTL or SystemC from Esterel Studio parametric IP.

Esterel Studio supports The SPIRIT Consortium Specification, v1.2 with:

  • Component schema export with RTL / SystemC / Esterel views
  • Loose Generator Interface (LGI) for full IP parameterization in SOC building tools.

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