Esterel Technologies Releases Esterel Studio™ 5.2

“Design for Verification” Handles Large Designs of Unlimited Size

MOUNTAIN VIEW, California, and ELANCOURT, France . December 20, 2004 . Esterel Technologies today announced the release of Esterel Studio 5.2, a comprehensive tool suite .including an editor, simulator, assertions verification, and VHDL, Verilog, C, and C++ code generators . for the design and verification of complex consumer and multimedia SoCs. Users of the powerful suite already are reporting savings up to 40%, compared to traditional verification cost and effort, and as much as 50% reduction in the number of bugs through early detection.

Esterel Studio allows designers to capture a design specification and then automatically generate the hardware description in HDL-RTL or C. Combining advanced simulation methods with a sophisticated proof engine, high-level primitives, and hierarchal state machines, Esterel Studio builds verification into the design process, eliminating the majority of functional errors at the start of the design process. Esterel Studio also enables architects and designers to develop a golden reference model in text and/or graphics with a complete path to correct-by-construction, automated implementation for consumer electronics and smart card applications.

Esterel Studio 5.2 has been enhanced to provide these important functions:

Scalable modular and hierarchical design flows to handle designs of unlimited size
Enhanced data path expressions and exact arithmetics, with static detection of unsigned overflows for safer and better optimized designs

“Esterel Studio is being used by leading semiconductor companies such as Texas Instruments, STMicroelectronics, and Philips Semiconductors,” said Eric Bantégnie, CEO of Esterel Technologies SA. “They use Esterel Studio 5.2 to create formal and unambiguous design specifications that greatly improve communication between hardware and software teams, as well as facilitate information sharing between customers and suppliers.” Bantégnie added, “Because changes can be made to the Esterel Studio golden specification model, and be reimplemented automatically, our users also are seeing up to 100-times productivity improvement in instituting late-stage design specification changes.”

Esterel Studio 5.2 is available in LAN and WAN configurations with one-year time-based licensing starting at US $33,000.

About Esterel Technologies

Esterel Technologies products solve the problems of high-reliability embedded design, support creation, validation, and verification with complete tool suites powered by abstraction and synchronous languages. Its tools create unambiguous specifications that produce correct-by-construction software designs and hardware designs that can be implemented automatically. SCADE Suite™ is the de facto standard for the creation of safety-critical embedded software in the civilian avionics industry. SCADE Drive™ is the emerging standard for the creation of safety-critical embedded software in the automotive industry. Esterel Studio™ enables embedded hardware designers to create a golden specification model that can be implemented automatically in VHDL, Verilog, C, and C++.

Esterel Technologies is a privately held company with headquarters in Mountain View, California, USA, and Elancourt, France, and offices in Germany, the United Kingdom, and China.

For more information, visit the Esterel Technologies website at www.esterel-technologies.com.

Press Contacts:

Central Europe

Gundel Hahn, Gundel Hahn Medienservice

Phone: +49 (0)89 123 922 04

Email: Gundel.Hahn@esterel-technologies.com

North Europe

Jeremy Carne, Carne Communications

Phone : +44 (0)20 7384 2500

Email : jeremy@carne.com

North America

Chip Downing, Esterel Technologies

Phone: +1 650-641-1707

Email: chip.downing@esterel-technologies.com

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