Esterel EDA

How is Esterel Studio used?

Esterel Studio is used for specification and design of non core IP blocks such as: bus and peripheral interfaces, communication protocols, memory controllers, power management, and core peripherals.

Esterel Studio modeling activities start at the IP specification and micro architecture level. Esterel Studio supports both transactional level and cycle-accurate level modeling. From there, C/C++/SystemC virtual prototypes are automatically generated. Also available, RTL automatic generation from the same specification enable direct connection to existing RTL implementation flows.