SPIRIT SystemC Consulting Esterel Consortium Esterel Studio IEEE P1778 Seminars Design Targets VHDL, Verilog Examples Standards ESL Synthesis Verification Academic How-To Partners Gérard Berry
Products & Services
Esterel Studio™
delivers the full benefits of ESL synthesis with automated RTL/C/SystemC code production from a single and formally verified Esterel Studio IP executable specification.
SoC Design Services
Esterel EDA Technologies offers software and hardware development services that span the entire SoC implementation flows of technology leaders including : Texas Instruments, Thales, NXP and STMicroelectronics.
ESL Consulting Services
Our control-path ESL synthesis and assertion-based verification consultants will help you plug Esterel Studio in your RTL and SystemC flows, and connect to ESL datapath synthesis and system virtual platform tools.
IP Design Targets
Esterel Studio is the leading ESL tool for control-intensive hardware IP. Find out design targets for wireless communications, processors, peripheral cores, bus and peripheral interfaces, memory, power management, and more …
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ESL Synthesis Ready
Reduce your time to market by at least 30%
Improve team communication with formal and easy to understand executable specifications
Increase quality with formal verification finding most bugs and corner cases before system-level simulation
Cut RTL and SystemC costs with automatic code generation
The Esterel Consortium gathers customers and partners who collaborate to the definition of Esterel Studio roadmap and provide industrial feed-back …
